Advances in semi-conductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a corollary, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple cores, multiple hardware threads, and multiple logical processors present on individual integrated circuits, as well as other interfaces integrated within such processors. A processor or integrated circuit typically comprises a single physical processor die, where the processor die may include any number of cores, hardware threads, logical processors, interfaces, memory, controller hubs, etc. And as both processors and computer systems grow in complexity, so does the nature of test and debug of those systems grow in intricacy.
The high-speeds, massive amount of logic, and small nature or processors are leading toward an inability to debug, validate, and launch products in a timely or cost-effective manner. Currently, the world of test and debug has been bifurcated between manufacturers and customers/vendors, where manufactures tend to focus on the silicon devices they provide and vendors focus on other parts that integrate with the silicon devices. Often to protect their silicon from both malicious and accidental damage, manufacturers don't expose their hardware debug hooks at any level to vendors, because there is no secure method of providing such access. And as the complexity of testing more advanced computer systems becomes more involved, manufactures spend a massive amount of money and effort to aide in validation; even when discovered problems are not directly related to their devices. Moreover, each different device (processor, controller hub, graphics device, motherboard, etc.) in a system may have its own access for test and debug. This disjoint approach at testing/debug has only led to more confusion and delay in validating products. In addition, traditional probing test methods have become prohibitive due to the physical size limitations of new integrated circuits.
Furthermore, regardless of being a manufacturer or vendor, the tools to attempt validation, such as external logic analyzers and oscilloscopes, cost a considerable amount of money, as well as take a significant amount of time by trained employees to connect and be utilized correctly for validation. Additionally, these external validation tools are only able to capture protocol exchanges on interconnects and have difficulty fully ascertaining the states and interactions of devices.
As specific examples, current computer systems don't provide ways to validate different system events under certain conditions without great expense and time, such as tracking device internal signals, traces, or states; tracking signals early in a boot process; determining certain events, such as hang events, that have been integrated as in-band messages, and capturing new, high-speed internal, memory, and Input/Output (I/O) traffic and/or protocols. Essentially, there is currently no unified, effective way to validate across multiple vectors (processor test/validate, platform debug, electrical margining, motherboard diagnostics, etc.).